DocumentCode :
2173776
Title :
Low power (51 mW per flip-flop) CML static divider implemented in scaled 0.25 μm emitter-width InP DHBTs
Author :
Hussain, Tahir ; Hitko, Donald A. ; Royter, Yakov ; Rajavel, Rajesh D. ; Elliott, Kenneth ; McCalla, Kathy ; Madhav, Meena ; Sokolich, Marko
Author_Institution :
HRL Labs., Malibu, CA, USA
fYear :
2005
fDate :
8-12 May 2005
Firstpage :
347
Lastpage :
350
Abstract :
We report the fabrication and performance of a static CML frequency divider implemented in 0.25μm emitter-width InP DHBT technology. This circuit consumed an average of 51 mW per flip-flop in a divide by 8 configuration while dividing a 120 GHz input. To our knowledge this is the highest toggle rate reported for circuits with power consumption as low as this.
Keywords :
III-V semiconductors; current-mode logic; frequency dividers; heterojunction bipolar transistors; indium compounds; 0.25 micron; 120 GHz; 51 mW; InP; InP double heterojunction bipolar transistors fabrication; emitter-width; flip-flop; power consumption; static CML frequency divider; toggle rate; Circuit synthesis; Clocks; Double heterojunction bipolar transistors; Energy consumption; Fabrication; Flip-flops; Frequency synthesizers; Indium phosphide; Power dissipation; Signal synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Indium Phosphide and Related Materials, 2005. International Conference on
ISSN :
1092-8669
Print_ISBN :
0-7803-8891-7
Type :
conf
DOI :
10.1109/ICIPRM.2005.1517498
Filename :
1517498
Link To Document :
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