DocumentCode :
2173886
Title :
Threshold voltage extraction circuit for low voltage CMOS design using basic long-channel MOSFET
Author :
Toledo, Luis Eduardo ; Petrashin, Pablo Antonio ; Lancioni, Walter Jose ; Vazquez, Carlos Daniel
Author_Institution :
Facultad de Ingeniería, Universidad Católica de Córdoba, Argentina
fYear :
2015
fDate :
24-27 Feb. 2015
Firstpage :
1
Lastpage :
4
Abstract :
The threshold voltage (Vth) is a key parameter in MOSFET design and modeling. There are many definitions and extraction methods, each one given with a focus on different aspects. This work presents a simple circuit that extracts the threshold voltage under low voltage conditions and using a feedback loop in order to reach supply independence. The circuit has been simulated using the BSIM3v3 model for a 0.18µm CMOS process. The extracted value of VTHN is very close to the model nominal value (VTHO) used from the model parameters being the variation of +0.327% and −0.294% from VDD=0.6V to VDD=3V. The bias current I is from 810.7nA to 872nA for the same supply voltage variation.
Keywords :
Integrated circuit modeling; Logic gates; Low voltage; MOSFET; Resistors; Semiconductor device modeling; Threshold voltage; Analog VLSI; MOSFET characterization; Vth extractors; low voltage circuits; parameters extraction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits & Systems (LASCAS), 2015 IEEE 6th Latin American Symposium on
Conference_Location :
Montevideo, Uruguay
Type :
conf
DOI :
10.1109/LASCAS.2015.7250467
Filename :
7250467
Link To Document :
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