Title :
aEqualized: A novel routing algorithm for the Spidergon Network On Chip
Author :
Concer, Nicola ; Iamundo, Salvatore ; Bononi, Luciano
Author_Institution :
Dipt. di Sci. dell´´Inf., Univ. di Bologna, Bologna
Abstract :
We present the aEqualized routing algorithm: a novel algorithm for the Spidergon Network on Chip. AEqualized combines the well known aFirst and aLast algorithms proposed in literature obtaining an optimized use of the channels of the network. This optimization allows to reduce the number of channels actually implemented on the chip while maintaining similar performances achieved by the two basic algorithms. In the second part of this paper, we propose a variation on the Spidergon´s router architecture that enhances the performance of the network especially when the aEqualized routing algorithm is adopted.
Keywords :
circuit optimisation; network routing; network-on-chip; Spidergon network on chip; Spidergon router architecture; aEqualized routing algorithm; network channel optimisation; Buffer storage; Clocks; Communication switching; Computer architecture; Network interfaces; Network topology; Network-on-a-chip; Routing; System recovery; System-on-a-chip;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
Print_ISBN :
978-1-4244-3781-8
DOI :
10.1109/DATE.2009.5090764