DocumentCode
2174491
Title
Metastability of SOI CMOS latches
Author
Tretz, C. ; Chuang, C.T. ; Terman, L.M. ; Anderson, C.J. ; Zukowski, C.
Author_Institution
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
fYear
1997
fDate
6-9 Oct 1997
Firstpage
162
Lastpage
163
Abstract
SOI has recently emerged as a serious contender for low-power high-performance applications. This paper examines the metastability of CMOS latches based on partially-depleted (PD) SOI devices with various body-connection topologies
Keywords
CMOS logic circuits; circuit stability; flip-flops; silicon-on-insulator; SOI CMOS latch; body-connection topology; low-power circuit; metastability; partially-depleted SOI device; Clamps; Clocks; Diodes; MOSFET circuits; Metastasis; Power supplies; Rails; Switches; Topology; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 1997. Proceedings., 1997 IEEE International
Conference_Location
Fish Camp, CA
ISSN
1078-621X
Print_ISBN
0-7803-3938-X
Type
conf
DOI
10.1109/SOI.1997.634983
Filename
634983
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