VLSI beyond CMOS Devices: Nano, single electron and spintronic devices

The structural complexity of VLSI chip has been increasing at an exponential rate over the last thirty years. The phenomenal growth rate sustained primarily by the constant advances in manufacturing technology, as well as by the increasing need for integrating more complex functions on chip. Answering the needs of rapidly rising chip complexity has created significant challenges and aided the development of many areas, e.g. development of computer aided design (CAD) tools, chip design, fabrication, packaging, testing and reliability qualification. The main objective, however, remains device miniaturization. Device miniaturization results in reduced unit cost per function and in improved performance. As a result, the cost per bit of memory chips has almost halved every two years for successive generation of random access memories. Cost of logic ICs also have gone down. As device dimension decreases, the intrinsic switching time in MOSFETs deceases linearly, since the intrinsic delay is given approximately by the channel length divided by the carrier velocity. The device speed has improved by four orders of magnitude since 1960s.