DocumentCode
2176295
Title
C-Sim - the C language enhancement for discrete-time simulation
Author
Hlavicka, Jan ; Racek, Stanislav
Author_Institution
Czech Tech. Univ., Prague, Czech Republic
fYear
2002
fDate
2002
Firstpage
539
Abstract
The paper presents the C-Sim simulation environment, which enables the execution of several processes in an interleaved mode using the global simulation lime concept. C-Sim was used within the EU/IST project Fault Injection for Time Triggered Architecture (FIT) to build a simulation model of TTP/C protocol based real-time embedded computer system in order to verify its dependability through fault injection.
Keywords
C language; discrete event simulation; embedded systems; simulation languages; C-Sim; Fault Injection for Time Triggered Architecture; TTP/C protocol; embedded computer system; fault injection; global simulation; interleaved mode; simulation environment; Computational modeling; Computer architecture; Computer simulation; Embedded computing; Kernel; Libraries; Portable computers; Process control; Protocols; Real time systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Dependable Systems and Networks, 2002. DSN 2002. Proceedings. International Conference on
Print_ISBN
0-7695-1101-5
Type
conf
DOI
10.1109/DSN.2002.1028956
Filename
1028956
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