Title :
Two-bit restricted signed-digit quaternary full adder
Author :
Awwal, Abdul Ahad S ; Ahmed, Jamal U.
Author_Institution :
Dept. of Comput. Sci. & Eng., Wright State Univ., Dayton, OH, USA
Abstract :
A multibit quaternary full adder is designed using a restricted set of modified signed-digit quaternary number system; Such adders could be stacked in parallel and they can add two n-bit numbers in a constant time irrespective of the operand size. An optical nonholographic content addressable memory is proposed for implementing the adder
Keywords :
adders; content-addressable storage; digital arithmetic; optical information processing; n-bit number addition; optical nonholographic content addressable memory; two-bit restricted signed-digit quaternary full adder; Adders; Bandwidth; Computer science; Concurrent computing; Design engineering; High speed optical techniques; Image recognition; Optical computing; Parallel processing; Pattern recognition;
Conference_Titel :
Aerospace and Electronics Conference, 1994. NAECON 1994., Proceedings of the IEEE 1994 National
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-1893-5
DOI :
10.1109/NAECON.1994.332917
