Variable latency speculative Han-Carlson adders topologies

Speculation can enhance adders performance by making carry predictions. It consists in replacing the arithmetic function with a faster, approximated, one, giving correct results most of the time. An error detection stage flags the misprediction events, in such cases, a two-cycles error correction stage is used, constituting a variable latency speculative adder. This paper proposes novel variable latency speculative adders based on Han-Carlson parallel-prefix topologies. The proposed adders are more effective than variable latency Kogge-Stone adders previously proposed in literature. A novel error detection technique that reduces error probability, compared to previous approaches, is proposed. Synthesis results, in the UMC 65nm library, show that proposed variable latency topologies outperform previously developed speculative Kogge-Stone adders and non-speculative ones, when high-speed is required. It is also shown that non-speculative adders remain the best choice when the speed constraint is relaxed.