Title :
A reconfigurable systolic array for polynomial multiplication modulo Xn±1
Author :
Sarkari, Zarir B. ; Skavantzos, Alexander ; Stouraitis, Thanos
Author_Institution :
Dept. of Electr. & Comput. Eng., Louisiana State Univ., Baton Rouge, LA, USA
Abstract :
A simple reconfigurable processor array that utilizes the polynomial residue number system (PRNS) for polynomial multiplication is presented. The mesh-connected systolic array is, in fact, a combination of linear one-dimensional arrays operating in parallel. The reconfiguration scheme is based on a dual role played by the processing elements constituting the array
Keywords :
cellular arrays; mathematics computing; parallel architectures; polynomials; linear 1D array; mesh-connected systolic array; parallel architecture; parallel processing; polynomial multiplication; polynomial residue number system; reconfigurable systolic array; Autocorrelation; Convolution; Digital arithmetic; Fast Fourier transforms; Fault tolerance; Flexible printed circuits; Parallel processing; Polynomials; Systolic arrays; Very large scale integration;
Conference_Titel :
System Theory, 1989. Proceedings., Twenty-First Southeastern Symposium on
Conference_Location :
Tallahassee, FL
Print_ISBN :
0-8186-1933-3
DOI :
10.1109/SSST.1989.72511
