DocumentCode
2177724
Title
A CMOS four quadrant current/transconductance multiplier
Author
Diaz-Sanchez, Alejandro ; Ramirez-Angulo, Jaime ; Sanchez-Sinencio, Edgar ; Han, Gunhee
Author_Institution
Centro Nacional de Investigacion y Dasarrollo Tecnologico, Morelos, Mexico
Volume
1
fYear
1997
fDate
3-6 Aug 1997
Firstpage
237
Abstract
This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based in the square-law characteristic of MOS transistors in saturation region. SPICE simulations with 2 μm CMOS parameters are shown that verify the operation of the circuit
Keywords
CMOS analogue integrated circuits; SPICE; analogue multipliers; digital simulation; 2 mum; CMOS; MOS transistors; SPICE simulation; current/transconductance multiplier; differential circuit; four quadrant multiplier; linear current; saturation region; square-law characteristic; CMOS analog integrated circuits; Circuit simulation; Distortion; Frequency; Impedance; Linearity; Mirrors; Signal processing; Transconductance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Conference_Location
Sacramento, CA
Print_ISBN
0-7803-3694-1
Type
conf
DOI
10.1109/MWSCAS.1997.666077
Filename
666077
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