Title :
An ATM application specific integrated processor
Author :
Harasawa, Akio ; Kaganoi, Teruo ; Kanoh, Toshiyuki ; Nishizaki, Hideki ; Suzuki, Masanobu ; Tomizawa, Hitoshi ; Shindou, Takeshi
Author_Institution :
NEC Corp., Kanagawa, Japan
Abstract :
An application specific integrated processor designed for ATM cell processing applications is described in this paper. A new dedicated architecture consisting of a custom-made CPU core, a pipeline input cell buffer and a content addressable memory (CAM) is employed to realize both high performance data processing and functional re-configurability. The chip has been implemented on 0.5 μm CMOS. It consumes 2400 mW power under 3.3 V supply at 52 MHz clock frequency for a 155 Mbps high speed cell data stream. Programs for several different applications have been developed and are running on this chip. As a result of evaluation, each application program satisfies a required performance
Keywords :
CMOS integrated circuits; application specific integrated circuits; asynchronous transfer mode; microprocessor chips; reconfigurable architectures; 0.5 micron; 155 Mbit/s; 2400 mW; 3.3 V; 52 MHz; ATM cell processing; CMOS chip; application specific integrated processor; content addressable memory; custom-made CPU core; data processing; dedicated architecture; pipeline input cell buffer; reconfigurability; Asynchronous transfer mode; CADCAM; Central Processing Unit; Circuits; Computer aided manufacturing; Electrochemical machining; National electric code; Pipelines; Streaming media; Traffic control;
Conference_Titel :
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3669-0
DOI :
10.1109/CICC.1997.606663
