High-accuracy CMOS current comparator

Author

Wang, Cheng-Ping ; Wey, Chin-Long

Author_Institution

Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA

Volume

1

fYear

1997

fDate

3-6 Aug 1997

Firstpage

346

Abstract

This paper presents a high accuracy, low-power CMOS current copier which can be operated in a low-voltage environment. The circuit has been designed and simulated with the MOSIS SCN 2 μm CMOS process parameters and 2 V supply voltage. The proposed current copier has a simple structure and its layout area is 0.01 mm². Simulation result shows that the proposed circuit achieves a small offset current, 0.1 nA, and low power dissipation, 20 μW. Therefore, the proposed current comparator is suited to the applications of built-in tester for switched-current circuits

Keywords

CMOS analogue integrated circuits; analogue processing circuits; circuit analysis computing; current comparators; digital simulation; switched current circuits; CMOS current comparator; MOSIS SCN; built-in tester; layout area; low-voltage environment; offset current; power dissipation; switched-current circuits; Analog circuits; CMOS process; Capacitors; Circuit simulation; Circuit testing; Power dissipation; Signal processing; Switches; Switching circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on

Conference_Location

Sacramento, CA

Print_ISBN

0-7803-3694-1

Type

conf

DOI

10.1109/MWSCAS.1997.666105

Filename

666105