DocumentCode :
2178859
Title :
Measurement of Supply Pin Current Distributions in Integrated Circuit Packages
Author :
Weaver, James A. ; Horowitz, Anid Mark A
Author_Institution :
Stanford Univ., Stanford
fYear :
2007
fDate :
29-31 Oct. 2007
Firstpage :
7
Lastpage :
10
Abstract :
Maintaining low supply impedance is a critical task in modern high-performance chip and system design, and this depends on how the current flows on the chip, package, and board power distribution layers. Using a simple inductive pickup loop previously described, we measure the per-pin via currents for a large VLSI chip in operation. Interestingly, the variation in AC current across the package was only 33%. indicating that for this chip current crowding was not an issue. Furthermore, we measured the board bypass capacitance currents as well, and found that the capacitors supplied between 80%n and 120% of the peak transient currents of the pins to which I hey were connected. Since the maximum current is only slightly larger than the current required by the attached pin, the board bypass capacitance primarily affects the pin it is connected to, and does not really bypass the other VDD pins in that region.
Keywords :
current distribution; electric current measurement; integrated circuit design; integrated circuit packaging; power distribution; VDD pin; board bypass capacitance current; board power distribution layer; integrated circuit packages; modern high-performance chip; supply pin current distribution measurement; Capacitance; Current distribution; Current measurement; Current supplies; Impedance; Integrated circuit measurements; Integrated circuit packaging; Pins; Power distribution; Semiconductor device measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 2007 IEEE
Conference_Location :
Atlanta, GA
Print_ISBN :
978-1-4244-0883-2
Type :
conf
DOI :
10.1109/EPEP.2007.4387109
Filename :
4387109
Link To Document :
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