DocumentCode :
2179409
Title :
A circuit for linearly decreasing temperature SET programming of PCM based on Ge-rich GST
Author :
Kiouseloglou, A. ; Covi, E. ; Navarro, G. ; Cabrini, A. ; Perniola, L. ; Torelli, G.
Author_Institution :
CEA-LETI, MINATEC Campus, 17 rue des Martyrs, F-38054 GRENOBLE Cedex 9, France
fYear :
2015
fDate :
June 29 2015-July 2 2015
Firstpage :
282
Lastpage :
285
Abstract :
Phase Change Memory (PCM) is the most mature among back-end emerging non-volatile memory concepts. In order to enable embedded PCM applications, the thermal properties of the chalcogenide material have to be boosted, by optimizing its stoichiometry. Ge enrichment of Ge2Sb2Te5 (GST) has been proved to be promising for improving the thermal stability of the technology, but also demonstrates an increase of the low-resistance state (LRS) resistivity as well as a larger resistance drift of this state towards higher resistance over time. This phenomenon can be minimized if an appropriate programming voltage pulse is applied, capable of providing a linearly decreasing temperature profile in the active region of the memory device. In this paper, we discuss the LRS resistance increase of PCM cells based on Ge-rich GST and present a programming voltage profile that is capable of generating a linearly decreasing temperature in the memory cell. A circuit that can generate the desired voltage waveform is presented and simulated in order to prove the functionality of the proposed solution.
Keywords :
Conductivity; Metals; Phase change materials; Phase change memory; Programming; Resistance; Thermal stability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Ph.D. Research in Microelectronics and Electronics (PRIME), 2015 11th Conference on
Conference_Location :
Glasgow, United Kingdom
Type :
conf
DOI :
10.1109/PRIME.2015.7251390
Filename :
7251390
Link To Document :
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