High-level synthesis of multithreaded processor based image generator

Design of a multithreaded processor dedicated to image generation is described, which can be achieved mainly by means of a high-level synthesis tool PARTHENON. The processor employs a multithread architecture which is a novel and promising approach to parallel image generation. This paper describes a high-level synthesis scheme which can simplify the behavioral description for the structure and control of a complex hardware, and therefore enables the design of complicated mechanism for a multithreaded processor. Implementation results of the synthesis are also shown to prove a practicability of the designed processor. The processor improves the throughput for image generation by the factor of 2.4 times, compared with the conventional design method