DocumentCode
2180881
Title
The Unified Discrete Fourier-Hartley Transforms Processor
Author
Potipantong, P. ; Oraintara, S. ; Sirisuk, P. ; Wiangtong, T. ; Worapishet, A.
Author_Institution
Mahanakorn Inst. of Microelectron., Mahanakorn Univ. of Technol., Bangkok
fYear
2006
fDate
Oct. 18 2006-Sept. 20 2006
Firstpage
479
Lastpage
482
Abstract
This paper presents a novel architecture of 256-point unified discrete Fourier-Hartley transform (UDHFT) processor for digital signal processing applications. The proposed architecture uses a UDHFT theory which can calculate the discrete Fourier and Hartley transforms (DFT, DHT) of types I-IV and the discrete cosine and sine transforms (DCT, DST) of types II-IV; moreover, the architecture utilizes the general existing fast Fourier transform (FFT) IP-core working with pre- and post-processing unit to process the entire UDHFT transforms. We implemented the proposed architecture on the Xilinx Virtex-H Pro FPGA. It achieves 256-point UDHFT transforms in 9.25 mus at 100 MHz operating clock frequency
Keywords
Hartley transforms; discrete Fourier transforms; discrete cosine transforms; signal processing; Xilinx Virtex-H Pro FPGA; digital signal processing applications; discrete cosine transforms; discrete sine transforms; fast Fourier transform; unified discrete Fourier-Hartley transforms processor; Biomedical computing; Computer architecture; Digital signal processing; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; Fast Fourier transforms; Field programmable gate arrays; Fourier transforms; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Information Technologies, 2006. ISCIT '06. International Symposium on
Conference_Location
Bangkok
Print_ISBN
0-7803-9741-X
Electronic_ISBN
0-7803-9741-X
Type
conf
DOI
10.1109/ISCIT.2006.339992
Filename
4141431
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