DocumentCode
2181111
Title
System level Validation of Improved IO Buffer Behavioral Modeling Methodology Based on IBIS
Author
Varma, Ambrish ; Steer, Michael ; Franzon, Paul
Author_Institution
NCSU, Raleigh
fYear
2007
fDate
29-31 Oct. 2007
Firstpage
351
Lastpage
354
Abstract
System level simulation and validation of a new macromodeling methodology based on IBIS (Input/Output Buffer Information Specification) models is presented. Enhancements of the black-box techniques discussed in [1] are discussed. The proposed macromodel is circuit based and can be customized by model makers or users. The new macromodel produces models that can be simulated accurately for Simultaneous Switching Noise (SSN). To demonstrate the solution, a CMOS voltage-mode driver circuit and a MICRON DDR2 driver are simulated using real life package models and compared with equivalent circuits created with IBIS models of the same drivers.
Keywords
CMOS memory circuits; buffer circuits; buffer storage; CMOS voltage-mode driver circuit; MICRON DDR2 driver; black-box technique; buffer behavioral modeling; complementary metal-oxide-semiconductor; input/output buffer information specification model; macromodeling; simultaneous switching noise; system level simulation; system level validation; Circuit noise; Circuit simulation; Current supplies; Driver circuits; Error correction; Packaging; Power system modeling; Semiconductor device modeling; Sun; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2007 IEEE
Conference_Location
Atlanta, GA
Print_ISBN
978-1-4244-0883-2
Type
conf
DOI
10.1109/EPEP.2007.4387200
Filename
4387200
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