Design and fabrication of a TSV interposer for SRAM integration

TSV interposer provides a cost efficient solution way for 3D IC integration. In this paper, a TSV interposer technology is proposed for SRAM stacking. A simple fabrication process is developed for cost-sensitive application. The mushroomlike Cu/Sn bumps by copper overburden can be directly connected with other substrate, which eliminates a CMP planarization to improve the yield and reduce fabrication cost. The electrical and thermal-mechanical behaviors of the 3D system were analyzed. Preliminary fabrication results are demonstrated. The TSV interposer technology is promising for 3D SRAM integration.