Solution to leakage of polyimide-structural wafer level package

For handheld products, package size is required as small as possible, new packaging technology such as wafer level chip scale packaging (WLCSP), stacking die, 3D packaging is developed quickly. So far, wafer level packaging is realized in mass production and accepted by most of semiconductor enterprises. However, mechanical reliability is the great concern for WLCSP products usage. The primary driving force of the electrical failure is rapidly winding of circuit board due to high-accelerated strain. To improve the mechanical performance of the package, PI is introduced to buffer the stress, but PI also increases the risk of leakage aspect to electrical performance. In this paper, experiments were conducted to decrease the leakage by investigating several factors, including etching solution concentration, etching time, etching temperature and plasma. The result shows that wet etching process optimization only can decrease the leakage to 18nA, but using wet etching coupled plasma method, the leakage is dropped dramatically and as small as 0.0InA. A mode is proposed to explain the action mechanism of plasma on decreasing leakage.