DocumentCode :
2184358
Title :
A 0.8 V quasi-floating-gate fully differential CMOS op-amp with positive feedback
Author :
Thongleam, Thawatchai ; Suadet, Apirak ; Kasemsuwan, Varakom
Author_Institution :
Sch. of Electron., King Mongkut´´s Inst. of Technol. Ladkrabang, Bangkok, Thailand
fYear :
2011
fDate :
17-19 May 2011
Firstpage :
98
Lastpage :
101
Abstract :
This paper presents a 0.8 V fully differential CMOS op-amp. The input stage of the circuit is designed using quasi-floating-gate (QFG) transistors with positive feedback, while QFG transistors in the output stage are connected in the class AB configuration. QFG transistors are employed, enabling the circuit to operate under low supply voltage. The proposed amplifier is designed using 0.18 μm CMOS technology, and simulation results show rail-to-rail input and output swings. The open-loop gain is 80.4 dB with the gain-bandwidth product of 8.66 MHz. Phase margin is 45° (CL= 20 pF). The CMRR is 107 dB (at 1 kHz) and the power consumption is 54.9 μW.
Keywords :
CMOS analogue integrated circuits; differential amplifiers; integrated circuit design; operational amplifiers; class AB configuration; frequency 1 kHz; frequency 8.66 MHz; gain 80.4 dB; positive feedback; power 54.9 muW; quasi-floating-gate fully differential CMOS op-amp; quasi-floating-gate transistors; size 0.18 mum; voltage 0.8 V; CMOS integrated circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2011 8th International Conference on
Conference_Location :
Khon Kaen
Print_ISBN :
978-1-4577-0425-3
Type :
conf
DOI :
10.1109/ECTICON.2011.5947780
Filename :
5947780
Link To Document :
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