• DocumentCode
    2184472
  • Title

    A Reconfigurable Platform for MPEG-4 Encoder Based on SOPC

  • Author

    Cai, Ken ; Liang, Xiaoying ; Wang, Keqiang

  • Author_Institution
    Sch. of Biosci. & Bioeng., South China Univ. of Technol., Guangzhou, China
  • fYear
    2009
  • fDate
    17-19 Oct. 2009
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    The appearance of the new MPEG-4 standard offers opportunities for real-time implementations of MPEG-4 encoders suitable for a wide range of applications, including video conferencing, digital storage media, television broadcasting, Internet streaming, and communication. With the rapid development of FPGA, SOPC has been paid great attentions in the area of image and video processing in recent years. A parallel MPEG-4 Simple Profile encoder for FPGA based System-onChip (SOC) is presented. The architecture is truly scalable and is based on a vendor-independent intellectual property (IP) block interconnection network. Also, several key modules of MPEG-4 are integrated into an efficient platform in hardware/software codesign fashion. The hardware platform utilized to design the system is an SOPC board, which includes an FPGA chip of model EP2C35F484C8, an Ethernet controller and a camera interface. Finally, the encoder has been tested on the Altera NIOS II development board and can work up to 100 MHz. Implementation results show that this platform provides enough resources and speed to implement even complex multimedia embedded systems in real time.
  • Keywords
    embedded systems; field programmable gate arrays; hardware-software codesign; logic design; microprocessor chips; reconfigurable architectures; system-on-chip; video coding; Ethernet controller; FPGA; Internet streaming; SOPC; block interconnection network; camera interface; digital storage media; hardware-software codesign fashion; image processing; parallel MPEG-4 simple profile encoder; reconfigurable platform; system-on-chip; television broadcasting; vendor-independent intellectual property; video conferencing; video embedded system; video processing; Communication standards; Computer architecture; Digital video broadcasting; Field programmable gate arrays; Hardware; Internet; MPEG 4 Standard; Streaming media; TV broadcasting; Videoconference;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Image and Signal Processing, 2009. CISP '09. 2nd International Congress on
  • Conference_Location
    Tianjin
  • Print_ISBN
    978-1-4244-4129-7
  • Electronic_ISBN
    978-1-4244-4131-0
  • Type

    conf

  • DOI
    10.1109/CISP.2009.5305166
  • Filename
    5305166