3D modeling and electrical characteristics of through-silicon-via (TSV) in 3D integrated circuits

Author

Liang, Lei ; Miao, Min ; Li, Zhensong ; Xu, Shufang ; Zhang, Yuexia ; Zhang, Xiaoqing

Author_Institution

Inf. Microsyst. Inst., Beijing Inf. Sci. & Technol. Univ., Beijing, China

fYear

2011

fDate

8-11 Aug. 2011

Firstpage

1

Lastpage

5

Abstract

Probably the most widely known more-than-Moore solutions is 3D chip stacking using TSV. The authors of this paper propose an equivalent circuit model of TSV and extract the values of passive elements within the model from full-wave scattering parameters simulation. Then, in order to estimate the signal distortion, the eye-diagram and TDR simulation are made and demonstrated. Additionally, transmission performance and the crosstalk of differential TSV with redistribution layer (RDL) are explored. The design rules for optimized crosstalk performance for TSVs with RDL are put forward.

Keywords

S-parameters; crosstalk; equivalent circuits; integrated circuit design; integrated circuit modelling; integrated circuit packaging; three-dimensional integrated circuits; 3D chip stacking; 3D integrated circuits; 3D modeling; TDR simulation; TSV equivalent circuit model; differential TSV crosstalk; electrical characteristics; eye-diagram; full-wave scattering parameters simulation; passive elements; redistribution layer; signal distortion; through-silicon-via; Crosstalk; Integrated circuit modeling; Silicon; Solid modeling; Substrates; Three dimensional displays; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2011 12th International Conference on

Conference_Location

Shanghai

Print_ISBN

978-1-4577-1770-3

Electronic_ISBN

978-1-4577-1768-0

Type

conf

DOI

10.1109/ICEPT.2011.6066879

Filename

6066879