Vertical floating pins in OTC routing [VLSI layout]

Author

Peters, I. ; Molitor, P. ; Weber, M.

Author_Institution

Comput. Sci., Halle Univ., Germany

fYear

1996

fDate

18-21 Nov 1996

Firstpage

385

Lastpage

388

Abstract

We present a generalized center terminal cell model and propose over-the-cell (OTC) routing algorithms, utilizing the new feature of the model, i.e., Vertical Floating Pins (VFPs). We approach the problem by linear integer programming and by dynamic programming. For further channel density reduction, both approaches have been combined with linear channel pin assignment. Experiments show a total density reduction by 45% compared to other OTC routing algorithms for center terminal cells

Keywords

VLSI; circuit layout CAD; dynamic programming; integer programming; integrated circuit layout; linear programming; network routing; OTC routing; VLSI layout; channel density reduction; dynamic programming; generalized center terminal cell model; linear channel pin assignment; linear integer programming; over-the-cell routing algorithms; vertical floating pins; CMOS technology; Computer science; Dynamic programming; Electronic mail; Integer linear programming; Linear programming; Pins; Routing; Semiconductor device modeling; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1996., IEEE Asia Pacific Conference on

Conference_Location

Seoul

Print_ISBN

0-7803-3702-6

Type

conf

DOI

10.1109/APCAS.1996.569296

Filename

569296

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2185016