DocumentCode :
2185387
Title :
Current-mode algorithmic pipeline analog-to-digital converter
Author :
Correia, A.J. ; Guilherme, J.C. ; Franca, J.E.
Author_Institution :
Centre of Microsyst., Integrated Circuits & Syst. Group, Inst. Superior Tecnico, Lisbon, Portugal
fYear :
1996
fDate :
18-21 Nov 1996
Firstpage :
401
Lastpage :
404
Abstract :
Current-mode integrated circuit design techniques offering full compatibility with mainstream digital CMOS technology have been investigated for the realization of an 8-bit 1 MHz analog-to-digital converter. This is based on a modular 1-bit-per-stage pipeline architecture employing a compact algorithmic processing circuitry in each stage. The prototype chip fabricated in a 1.2 μm digital CMOS technology occupies 0.655 mm2 of silicon area and dissipates 50 mW at 5 V supply
Keywords :
CMOS integrated circuits; analogue-digital conversion; integrated circuit design; pipeline processing; 1 MHz; 1.2 micron; 5 V; 50 mW; 8 bit; algorithmic pipeline ADC; analog-to-digital converter; compact algorithmic processing circuitry; current-mode IC design; digital CMOS technology; modular pipeline architecture; Analog-digital conversion; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Integrated circuit technology; Mirrors; Pipelines; Prototypes; Signal processing; Signal processing algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1996., IEEE Asia Pacific Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-3702-6
Type :
conf
DOI :
10.1109/APCAS.1996.569300
Filename :
569300
Link To Document :
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