DocumentCode
2185503
Title
Implementation aspects for interference alignment
Author
Yetis, Cenk M. ; Anand, Kushal ; Kayran, Ahmet H. ; Guan, Yong L. ; Gunawan, Erry
Author_Institution
Electrical and Electronics Engineering Department, Mevlana University, Turkey
fYear
2015
fDate
21-24 July 2015
Firstpage
580
Lastpage
584
Abstract
Several interference alignment (IA) testbeds have been reported by research groups that validate the theoretical findings thus demonstrating the feasibility of IA. The design complexity of the IA testbed is significant since many simultaneous wireless links have to be established to observe the benefits of IA. Therefore, the already enormous efforts needed for the development of multiple-input multiple-output (MIMO) testbeds are folded multiple times in IA testbeds. In general, testbeds can be categorized into three groups depending on the hardware platform, generic, specific and the hybrid of two. Clearly, developing on generic, hybrid and application specific platforms in turn are the safe steps towards real life prototyping. There are many research groups that have been developing IA on generic platforms [1]–[17]. To the best of our knowledge, there is only one research group that has developed on a hybrid platform [18], and none on the application specific platform. In this paper, we review the experimental IA evaluations in the literature, include important aspects from well-known prototyping principles in the picture, and give comparative discussion with the state-of-art wireless communications testbeds.
Keywords
Digital signal processing; Hardware; Interference; MIMO; Real-time systems; Relays; Wireless communication; ASIC; DSP; FPGA; Interference alignment; MIMO; OFDM; USRP; microcontroller; prototyping;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Signal Processing (DSP), 2015 IEEE International Conference on
Conference_Location
Singapore, Singapore
Type
conf
DOI
10.1109/ICDSP.2015.7251940
Filename
7251940
Link To Document