DocumentCode :
2185651
Title :
Electrical simulation and measurement of IPD with multilayer thin film technology for WLP
Author :
Siew, Glen ; Soh, Serine ; Tee, Tong Yan ; Chen, Haoyang ; Kang, In Soo ; Kim, Jong Heon
Author_Institution :
R&D Team, Nepes Pte Ltd., Singapore, Singapore
fYear :
2011
fDate :
8-11 Aug. 2011
Firstpage :
1
Lastpage :
6
Abstract :
This work focuses on the development of Integrated Passive Devices (IPD) from electrical design, modeling and simulation till final fabrication and device technology qualification stage. Passivation layer of Polyimide (PI) type was used as inter-metal dielectric materials together with semi-additive copper plated redistribution layer (RDL) as conductive material that carries signal traces through the devices. It also applies multilayer thin film technology used in Wafer-level Packaging (WLP) processes. The thin film setup was designed at 6-layers, which comprises three Polyimide layers and three RDL. Passive devices are designed for Radio Frequency Integrated Circuit (RFIC) applications that work mainly at frequencies of 2.4GHz and 5GHz. For IPD, inductors cover the range of InH and 23nH, and capacitors are within range of 0.03pF to 2.5pF. Several coplanar waveguide (CPW) transmission line structures were also included in the test vehicle prototype to characterize the copper RDL quality in transmitting high-frequency signals at Gigahertz range. Substrate material of low resistivity silicon wafers at 25 Ohm.cm was used for these structures which influences the quality factor of coils and capacitors. Integrated inductors and capacitors structures with stack-up of passivation and copper RDL were designed at realistic Wafer-level thin film thickness, which allows robust integration into WLP platform. Structures correlation of high-frequency measurements and simulation showed maximum of 5% deviation at high-frequency bandwidth. Fabricated structures perform well in time-zero failure analysis and reliability test of High Temperature Storage (HTS 500hr).
Keywords :
capacitors; coplanar transmission lines; dielectric materials; electrical resistivity; elemental semiconductors; inductors; multilayers; passivation; polymers; radiofrequency integrated circuits; silicon; thin films; wafer level packaging; IPD; WLP; capacitors; conductive material; coplanar waveguide transmission line structures; device technology qualification stage; electrical design; electrical measurement; electrical simulation; frequency 2.4 GHz to 5 GHz; high temperature storage; high-frequency bandwidth; high-frequency measurements; high-frequency signals; integrated passive devices; inter-metal dielectric materials; low resistivity silicon wafers; multilayer thin film technology; passivation layer; polyimide layer; radio frequency integrated circuit applications; reliability test; semi-additive copper plated redistribution layer; signal traces; substrate material; test vehicle prototype; time-zero failure analysis; Coils; Coplanar waveguides; Inductors; Integrated circuit modeling; Q factor; Temperature measurement; Transmission line measurements;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2011 12th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4577-1770-3
Electronic_ISBN :
978-1-4577-1768-0
Type :
conf
DOI :
10.1109/ICEPT.2011.6066918
Filename :
6066918
Link To Document :
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