DocumentCode :
2185778
Title :
Design of 8-Bit Serial Real-Time Decoder Based on Complex Programmable Logic Device
Author :
Wang, Xiao ; Cao, Baiyang
Author_Institution :
North China Inst. of Aerosp. Eng., Langfang, China
fYear :
2009
fDate :
17-19 Oct. 2009
Firstpage :
1
Lastpage :
3
Abstract :
This paper is aimed at the practical design method of 8-bit serial real-time decoder based on complex programmable logic device (CPLD). The design method is simple and novel. The decoder decodes the serial instruction-code from the land control center to the test system in the water adopting the serial peripheral interface agreement, in order to control various functions modules among the test system in the water, which include seven functions modules and each module control 8 kind of instructions real time. In the 8-bit serial code, the low four bits are the addresses, and the high four bits are instruction. Through the computer simulation and the actual system use, it achieves the design requirement of low error rate, stable operation, and high reliability.
Keywords :
decoding; peripheral interfaces; programmable logic devices; reliability; complex programmable logic device; computer simulation; low error rate; reliability; serial instruction code; serial peripheral interface; serial real time decoder; stable operation; word length 8 bit; Aerospace engineering; Aerospace testing; Computer simulation; Control systems; Decoding; Design methodology; Programmable logic devices; Real time systems; Signal processing; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Image and Signal Processing, 2009. CISP '09. 2nd International Congress on
Conference_Location :
Tianjin
Print_ISBN :
978-1-4244-4129-7
Electronic_ISBN :
978-1-4244-4131-0
Type :
conf
DOI :
10.1109/CISP.2009.5305212
Filename :
5305212
Link To Document :
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