A high speed VLSI architecture for scaled residue to binary conversion

The scaled Chinese Remainder Theorem (CRT) is a very useful tool for the simplification of RNS to binary converters. The main drawback of this methodology is related to the use of large look-up tables that store the correspondence among the modular numbers and the corresponding scaled terms of the CRT. This fact limits the maximum speed allowed by this approach. In this paper a new method for the computation of the scaled factors is presented. It allows the computation of the scaled CRT output by using very small look-up tables implemented by conventional logic and simple and fast structures, that work in parallel. The only assumption made in order to develop the new algorithm is that the moduli must be odd