DocumentCode
2185964
Title
Techniques for aggressive supply voltage scaling and efficient regulation [CMOS digital circuits]
Author
Dancy, Abram ; Chandrakasan, Anantha
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
fYear
1997
fDate
5-8 May 1997
Firstpage
579
Lastpage
586
Abstract
Aggressive voltage scaling to 1 V and below through technology, circuit, and architecture optimization is the key to low-power design. Threshold voltage scaling enables aggressive supply scaling but increases leakage power. Technology and circuit trends to control idle leakage power are presented including MTCMOS, variable VT bulk-CMOS, and variable VT SOI. Power can also be reduced by adaptively varying the supply voltage in applications where the computational workload varies with time. Aggressive voltage and power level scaling requires efficient DC-DC conversion circuitry and in some cases, it is necessary to embed this function in the processor
Keywords
CMOS digital integrated circuits; DC-DC power convertors; circuit optimisation; integrated circuit design; leakage currents; silicon-on-insulator; voltage control; voltage regulators; CMOS digital circuits; DC-DC conversion circuitry; MTCMOS; adaptive supply voltage variation; aggressive supply voltage scaling; architecture optimization; circuit optimization; efficient regulation; idle leakage power; leakage control; low-power design; technology optimization; threshold voltage scaling; variable VT SOI; variable VT bulk-CMOS; CMOS digital integrated circuits; Capacitance; Clocks; Costs; Design optimization; Energy consumption; Frequency; Statistics; Switching circuits; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location
Santa Clara, CA
Print_ISBN
0-7803-3669-0
Type
conf
DOI
10.1109/CICC.1997.606693
Filename
606693
Link To Document