High-performance electrical signaling

Author

Dally, William J. ; Lee, Ming Ju Edward ; An, Fu Tai ; Poulton, John ; Tell, Steve

Author_Institution

Comput. Syst. Lab., Stanford Univ., CA, USA

fYear

1998

fDate

15-17 Jun 1998

Firstpage

11

Lastpage

16

Abstract

This paper reviews the technology of high-performance electrical signaling, presents the current state of the art, and projects future directions. We have demonstrated equalized electrical signaling between CMOS integrated circuits at data rates of 4Gb/s. As the factors that determine this signaling rate all scale with improving technology we expect the data rates of high-performance electrical signaling systems to improve on a Moore´s Law curve. The frequency-dependent attenuation of copper wires sets a bandwidth-distance squared (Bd²) limit on the distance one can signal at a given data rate. Equalizing the channel cancels inter-symbol interference caused by this attenuation and greatly increases signaling distance. In the limit of perfect equalization, distance is ultimately limited by thermal noise in the receiver. At this limit, we calculate that a 4Gb/s system will be capable of operating over 100m of 24-gauge cable without repeaters

Keywords

CMOS digital integrated circuits; driver circuits; equalisers; integrated circuit interconnections; interference (signal); signalling; transceivers; 4 Gbit/s; CMOS integrated circuits; data rates; electrical signaling; high-performance; perfect equalization; signaling distance; thermal noise; Attenuation; CMOS integrated circuits; CMOS technology; Communication system signaling; Copper; Frequency; Integrated circuit technology; Interference cancellation; Moore´s Law; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Massively Parallel Processing, 1998. Proceedings. Fifth International Conference on

Conference_Location

Las Vegas, NV

Print_ISBN

0-8186-8572-7

Type

conf

DOI

10.1109/MPPOI.1998.682120

Filename

682120