Title :
Estimation of the signal-to-noise ratio for on-chip wireless clock signal distribution (year 2000)
Author :
Bravo, Daniel ; Yoon, Hyun ; Kim, Kihong ; Floyd, Brian ; O, Kenneth K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
Abstract :
The achievable signal-to-noise ratio for an 18-GHz wireless clock distribution system has been estimated by extrapolating from the current status of the clock receiver, the integrated antenna performance, and the understanding of noise sources and coupling mechanisms. It is estimated that a SNR of ~23 dB is achievable at the input of the frequency divider within the clock receiver block
Keywords :
clocks; integrated circuit noise; microprocessor chips; 18 GHz; clock receiver; frequency divider; integrated antenna; microprocessor; on-chip wireless clock signal distribution; signal-to-noise ratio; CMOS process; Circuit noise; Circuit testing; Clocks; Coupling circuits; Frequency conversion; Frequency estimation; Receiving antennas; Semiconductor device noise; Signal to noise ratio;
Conference_Titel :
Interconnect Technology Conference, 2000. Proceedings of the IEEE 2000 International
Conference_Location :
Burlingame, CA
Print_ISBN :
0-7803-6327-2
DOI :
10.1109/IITC.2000.854082
