• DocumentCode
    2188124
  • Title

    Strained-Si- and SiGe-on-insulator (strained-SOI and SGOI) MOSFETs for high performance/low power CMOS application

  • Author

    Takagi, S.

  • Author_Institution
    Adv. LSI Technol. Lab., Toshiba Corp., Kawasaki, Japan
  • fYear
    2002
  • fDate
    24-26 June 2002
  • Firstpage
    37
  • Lastpage
    40
  • Abstract
    We have proposed and demonstrated high performance strained-SOI and SGOI MOSFETs. It is strongly expected that strained-SOI and SGOI structures and devices based on these virtual substrates can provide new device options to sub-100 nm CMOS technology with high performance/low power consumption.
  • Keywords
    Ge-Si alloys; MOSFET; low-power electronics; silicon-on-insulator; 100 nm; Si; SiGe; low power CMOS technology; strained-SGOI MOSFET; strained-SOI MOSFET; virtual substrate; Atomic layer deposition; Charge carrier processes; Circuit optimization; Electron mobility; Germanium silicon alloys; Insulation; MOSFETs; Oxidation; Silicon germanium; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference, 2002. 60th DRC. Conference Digest
  • Conference_Location
    Santa Barbara, CA, USA
  • Print_ISBN
    0-7803-7317-0
  • Type

    conf

  • DOI
    10.1109/DRC.2002.1029495
  • Filename
    1029495
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2188124