Title :
Strained-Si- and SiGe-on-insulator (strained-SOI and SGOI) MOSFETs for high performance/low power CMOS application
Author_Institution :
Adv. LSI Technol. Lab., Toshiba Corp., Kawasaki, Japan
Abstract :
We have proposed and demonstrated high performance strained-SOI and SGOI MOSFETs. It is strongly expected that strained-SOI and SGOI structures and devices based on these virtual substrates can provide new device options to sub-100 nm CMOS technology with high performance/low power consumption.
Keywords :
Ge-Si alloys; MOSFET; low-power electronics; silicon-on-insulator; 100 nm; Si; SiGe; low power CMOS technology; strained-SGOI MOSFET; strained-SOI MOSFET; virtual substrate; Atomic layer deposition; Charge carrier processes; Circuit optimization; Electron mobility; Germanium silicon alloys; Insulation; MOSFETs; Oxidation; Silicon germanium; Substrates;
Conference_Titel :
Device Research Conference, 2002. 60th DRC. Conference Digest
Conference_Location :
Santa Barbara, CA, USA
Print_ISBN :
0-7803-7317-0
DOI :
10.1109/DRC.2002.1029495
