Title :
Demonstration of FinFET CMOS circuits
Author :
Rainey, B.A. ; Fried, D.M. ; Ieong, M. ; Kedzierski, J. ; Nowak, E.J.
Author_Institution :
IBM Microeletronics Div., Essex Junction, VT, USA
Abstract :
We present, to our knowledge, the first published experimental demonstration of a CMOS inverter chain built from FinFETs, completely integrated in 180nm CMOS technology, using one level of copper wiring and tungsten vias. A four-stage inverter chain with Lgate = 200nm, Tsi =, 60nm, and Tox = 2.2nm was run at 1.5V. We demonstrate successfully propagating CMOS levels through four inverter stages employing over 300 fins.
Keywords :
CMOS logic circuits; logic gates; 1.5 V; 180 nm; CMOS inverter chain; Cu; FinFET CMOS circuit; W; copper wiring; tungsten via; CMOS technology; Circuits; Electrodes; Etching; FinFETs; Implants; Inverters; Silicides; Tungsten; Voltage;
Conference_Titel :
Device Research Conference, 2002. 60th DRC. Conference Digest
Conference_Location :
Santa Barbara, CA, USA
Print_ISBN :
0-7803-7317-0
DOI :
10.1109/DRC.2002.1029499
