Author :
Chandra, Ashok K. ; Chandra, Ashok K. ; Chandra, Ashok K. ; Chandra, Ashok K. ; Stockmeyer, Larry J. ; Stockmeyer, Larry J. ; Stockmeyer, Larry J. ; Stockmeyer, Larry J. ; Vishkin, Uzi ; Vishkin, Uzi ; Vishkin, Uzi ; Vishkin, Uzi
Abstract :
A complexity theory for unbounded fan-in parallelism is developed where the complexity measure is the simultaneous measure (number of processors, parallel time). Two models of unbounded fan-in parallelism are (1) parallel random access machines that allow simultaneous reading from or writing to the same common memory location, and (2) circuits containing AND´s, OR´s and NOT´s with no bound placed on the fan-in of gates. It is shown that these models can simulate one another with the number of processors preserved to within a polynomial and parallel time preserved to within a constant factor. Reducibilities that preserve the measure in this sense are defined and several reducibilities and equivalences among problems are given. New upper bounds on the (unbounded fan-in) circuit complexity of symmetric Boolean functions are proved.