Title :
Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing
Author :
Etiemble, Daniel ; Bouaziz, Samir ; Lacassagne, Lionel
Author_Institution :
LRI, Paris Sud Univ., Orsay, France
Abstract :
We have implemented customized SIMD 16-bit floating point instructions on a NIOS II processor. On several image processing and media benchmarks for which the accuracy and dynamic range of this format is sufficient, a speed-up ranging from 1.5 to more than 2 is obtained versus the integer implementation. The hardware overhead remains limited and is compatible with the capacities of today´s FPGAs.
Keywords :
field programmable gate arrays; image processing; microprocessor chips; multimedia systems; parallel processing; 16 bit; FPGA image processing; FPGA media processing; NIOS II processor; customized SIMD; floating point instruction customization; Computer aided instruction; Costs; Digital signal processing; Dynamic range; Embedded computing; Field programmable gate arrays; Graphics; Hardware; Image processing; Microprocessors;
Conference_Titel :
Embedded Systems for Real-Time Multimedia, 2005. 3rd Workshop on
Print_ISBN :
0-7803-9347-3
DOI :
10.1109/ESTMED.2005.1518073
