DocumentCode :
2188403
Title :
A Lossless Circuit Layout Image Compression Algorithm for Maskless Lithography Systems
Author :
Yang, Jeehong ; Savari, Serap A.
Author_Institution :
EECS Dept., Univ. of Michigan, Ann Arbor, MI, USA
fYear :
2010
fDate :
24-26 March 2010
Firstpage :
109
Lastpage :
118
Abstract :
We introduce a transform-based technique to represent a circuit layout image so that 1) it typically leads to better compression ratios for maskless lithography systems than Block C4, the state-of-the-art compression scheme for this application, and 2) it permits faster encoding and less complex decoding than Block C4, while 3) it requires a similar amount of memory for decoding.
Keywords :
circuit layout; data compression; image coding; lithography; compression ratios; decoding; encoding; lossless circuit layout image compression algorithm; maskless lithography systems; transform-based technique; Chemicals; Circuits; Data compression; Decoding; Fabrication; Image coding; Image resolution; Image storage; Lithography; Microelectronics; Block C4; C4; Circuit Layout Image; Lossless image compression; Maskless Lithography System;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Data Compression Conference (DCC), 2010
Conference_Location :
Snowbird, UT
ISSN :
1068-0314
Print_ISBN :
978-1-4244-6425-8
Electronic_ISBN :
1068-0314
Type :
conf
DOI :
10.1109/DCC.2010.17
Filename :
5453455
Link To Document :
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