DocumentCode :
2188711
Title :
Inducing NNTrees Suitable for Hardware Implementation
Author :
Hayashi, Hirotomo ; Zhao, Qiangfu
Author_Institution :
Univ. of Aizu, Aizuwakamatsu
fYear :
2008
fDate :
27-28 Dec. 2008
Firstpage :
220
Lastpage :
225
Abstract :
Neural network tree (NNTree) is one of the efficient models for pattern recognition. One drawback in using an NNTree is that the system may become very complicated if the dimensionality of the feature space is high. To avoid this problem, we propose in this paper to reduce the dimensionality first using linear discriminant analysis (LDA), and then induce the NNTree. After dimensionality reduction, the NNTree can become much more simpler. The question is, can we still get good NNTrees in the lower dimensional feature space? To answer this question, we conducted experiments on several public databases. Results show that the NNTree obtained after dimensionality reduction usually has less number of nodes, and the performance is comparable with the one obtained without dimensionality reduction.
Keywords :
neural nets; pattern recognition; trees (mathematics); dimensional feature space; dimensionality reduction; linear discriminant analysis; neural network tree; pattern recognition; Computer science; Hardware; Neural networks; machine learning; multivariate decision trees; neural networks; pattern recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Frontier of Computer Science and Technology, 2008. FCST '08. Japan-China Joint Workshop on
Conference_Location :
Nagasahi
Print_ISBN :
978-1-4244-3418-3
Type :
conf
DOI :
10.1109/FCST.2008.17
Filename :
4736532
Link To Document :
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