DocumentCode
2188848
Title
Efficient Squarer Design Using Group Partial Products
Author
Hong, Sun-Ah ; Kim, Yong-Eun ; Chung, Jin-Gyun ; Lee, Sung-Chul
Author_Institution
Div. of Electronics & Information Engr., Chonbuk National University, Jeonju, Korea
fYear
2007
fDate
17-19 Oct. 2007
Firstpage
146
Lastpage
150
Abstract
The partial product matrix (PPM) of a squarer is symmetric. To reduce the depth of PPM, it can be folded, shifted and rearranged. In this paper, we propose a squarer design method using partial product grouping method. The proposed squarers lead to up to 24.7%, 24.4% and 6.7% reduction in area, power consumption and propagation delay compared with conventional squarers.
Keywords
Adders; Algorithm design and analysis; Circuit synthesis; Delay effects; Design methodology; Digital signal processing; Energy consumption; Hardware; Logic circuits; Signal processing algorithms; Squarer; Wallace tree; area reduction; group partial product;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 2007 IEEE Workshop on
Conference_Location
Shanghai, China
ISSN
1520-6130
Print_ISBN
978-1-4244-1222-8
Electronic_ISBN
1520-6130
Type
conf
DOI
10.1109/SIPS.2007.4387535
Filename
4387535
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