Multiple delta-doped layer structures for silicon power MOSFETs

Power MOSFET design is based on solving the tradeoff between breakdown voltage and on-resistance of the device. Standard devices show the following relation, R/sub on//spl prop/V/sub BD//sup 2.5...2.6/, wherein the on-resistance consists essentially of two parts: the resistance in the switching device and the resistance in the epitaxial drift zone. We have shown previously that our vertical concept of a power MOSFET gives a great improvement in the on-resistance, based on the avoided J-FET resistance, and based on the reduced channel resistance. The main advantage in our channel design is the gain in carrier mobility due to the newly introduced delta-doped layer. Moreover, delta-doped layers are thought to also improve the second important part of the on-resistance in the epitaxial drift zone and our first results prove so.