DocumentCode :
2189103
Title :
Development of functional substrate with embedded active components
Author :
Zhang, Xia ; Guo, Xueping ; Cui, Zhiyong ; Gu, Xin ; Kong, Linwen ; Cao, Liqiang ; Wan, Lixi
Author_Institution :
Inst. of Microelectron., Beijing, China
fYear :
2011
fDate :
8-11 Aug. 2011
Firstpage :
1
Lastpage :
5
Abstract :
Miniaturization, high density, multi-function and low cost of electronics has brought more requirements and challenges to the substrate and package level. This, in turn, has added more functionality to the substrate compared to the printed circuit board. A substrate embedded with both the active and the passive components, is also referred to as a functional substrate. In this paper, we propose, design, fabricate and test a functional substrate with embedded chips. The simulation, optimization and fabrication process of embedding active components inside the organic substrate is discussed. The motivation for this research is to examine ways to reduce both manufacturing cost and time-to-market. Simple daisy chain chips are designed and used in the simulated manufacturing exercise. In order to effectively simulate the fabrication process, thermal loading conditions have to be investigated. This can be done efficiently by numerical studies based on Finite Element Analyses (FEA). The thermal-mechanical properties of three embedding materials are also estimated through FEA analysis. Based on these process optimization simulations, functional substrates with embedded chips have been manufactured. Two laminated sequences are used in the fabrication process. The electrical and related reliability tests have been performed and demonstrate the viability of the manufacturing process for the embedding technology.
Keywords :
electronics packaging; finite element analysis; laminations; reliability; FEA; electronics packaging; embedded active components; embedded chip; finite element analyses; functional substrate; manufacturing process; organic substrate; printed circuit board; reliability testing; simple daisy chain chip; thermal loading condition; thermalmechanical property; Copper; Electronics packaging; Fabrication; Lamination; Packaging; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2011 12th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4577-1770-3
Electronic_ISBN :
978-1-4577-1768-0
Type :
conf
DOI :
10.1109/ICEPT.2011.6067032
Filename :
6067032
Link To Document :
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