DocumentCode
2190199
Title
A highly linear and high gain operational amplifier
Author
Chakraborty, Subhra ; Pandey, Abhishek ; Nath, Vijay
Author_Institution
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi, Jharkhand, India, Pin-835215
fYear
2015
fDate
24-25 Jan. 2015
Firstpage
1
Lastpage
4
Abstract
In this paper a novel high gain Op-Amp design is presented. This Proposed circuit also exhibits high linearity. The Architecture of the Op-Amp presented in this paper is based on cross-coupled differential pair and positive feedback. The proposed Op-Amp is designed in 0.18µm CMOS process using UMC90nm library in Cadence virtuoso analog design environment. The simulation of proposed circuit results in 124dB gain, 307MHz UGB and 69 degree phase margin while dissipating 221µW power. The THD analysis of the circuit shows a maximum distortion of 63dB at 2V output peak-to peak voltage and 1KHz frequency.
Keywords
CMOS integrated circuits; Differential amplifiers; Distortion; Gain; Linearity; Power harmonic filters; Transistors; CMOS Op-Amp; Cross-Coupled Differential pair; High Gain; High Linearity; Low Distortion; Positive Feedback;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical, Electronics, Signals, Communication and Optimization (EESCO), 2015 International Conference on
Conference_Location
Visakhapatnam, India
Print_ISBN
978-1-4799-7676-8
Type
conf
DOI
10.1109/EESCO.2015.7253641
Filename
7253641
Link To Document