A low phase noise CMOS ring VCO for short range device application

A low noise ring VCO architecture is proposed in this paper. The new VCO architecture uses a differential CMOS logic. The proposed VCO works at 179MHz to 438MHz by varying the control voltage from 0.3-V to 1-V thus making it compatible for Short Range Devices (SRD) application. Phase noise of −106dBc/Hz is obtained at an offset of 1MHz at operating frequency of 402MHz. The control mechanism in the VCO uses CMOS transmission gates for which it´s possible to operate at small frequencies and have small size at the same time. The VCO has been designed using 90nm CMOS technology in Cadence Virtuoso environment. At operating frequency of 402MHz the VCO consumes 309µW of power from 1-V power supply.