Title :
Design techniques for low power high bandwidth upconversion in CMOS
Author :
De Ranter, Carl ; Steyaert, Michiel
Author_Institution :
Dept. Elektrotechniek, Katholieke Univ., Leuven, Belgium
Abstract :
An upconvertor topology for low power, high bandwidth applications is presented. Using specific circuit techniques and local circuit-level optimization, the power consumption of the total system comprising an on-chip LC-type VCO, a polyphase network quadrature generator, a linear mixer block and an RF-current buffer, has been minimized. A chip has been designed and manufactured in a 0.25 μm CMOS technology. The VCO oscillates between 1.68 GHz and 2 GHz. Driven by an external LO, the transmitter operates from 900 MHz up to 2 GHz. At 2 GHz, the upconvertor transmits -12 dBm into 50 Ω with a linearity of more than -35 dBc for base band signals up to 33 MHz.
Keywords :
CMOS analogue integrated circuits; UHF frequency convertors; UHF integrated circuits; UHF mixers; circuit optimisation; integrated circuit design; low-power electronics; mobile radio; radio transmitters; 0.25 micron; 33 MHz; 900 MHz to 2 GHz; CMOS technology; RF design; RF-current buffer; circuit design techniques; high bandwidth upconversion; linear mixer block; local circuit-level optimization; low power upconversion; on-chip LC-type VCO; polyphase network quadrature generator; power consumption; transmitter; upconvertor topology; Bandwidth; CMOS technology; Circuit topology; Energy consumption; Manufacturing; Network topology; Network-on-a-chip; Power generation; System-on-a-chip; Voltage-controlled oscillators;
Conference_Titel :
Low Power Electronics and Design, 2002. ISLPED '02. Proceedings of the 2002 International Symposium on
Print_ISBN :
1-5811-3475-4
DOI :
10.1109/LPE.2002.146745
