DocumentCode :
2191213
Title :
A low-power digital matched filter for spread-spectrum systems
Author :
Goto, Shoji ; Yamada, Takashi ; Takayama, Norihisa ; Matsushita, Yoshifumi ; Harada, Yasoo ; Yasuura, Hiroto
Author_Institution :
Sanyo Electr. Co. Ltd., Gifu, Japan
fYear :
2002
fDate :
2002
Firstpage :
301
Lastpage :
306
Abstract :
A digital matched filter (DMF) is an essential device for direct-sequence spread-spectrum (DS-SS) communication systems. Reducing the power consumption of a DMF is especially critical for battery-powered terminals. The reception registers and the correlation-calculating unit dissipate the majority of the power in a DMF. In this paper we discuss this problem and propose a low-power architectural approach to a DMF. The total switching activity factor and the switched capacitance are reduced. As a result of power analysis at the gate level, the implementation of the proposed architecture in a standard 0.18-μm CMOS technology achieved a reduction in the power consumption of more than 70%.
Keywords :
CMOS digital integrated circuits; capacitance; digital filters; logic circuits; low-power electronics; matched filters; power consumption; spread spectrum communication; telecommunication terminals; 0.18 micron; CMOS technology; DS-SS communication; battery-powered terminals; correlation-calculating unit; direct-sequence spread-spectrum communication; low-power architectural approach; low-power digital matched filter; power consumption; reception registers; switched capacitance; total switching activity factor; Arithmetic; CMOS logic circuits; CMOS technology; Capacitance; Communication switching; Energy consumption; Matched filters; Multiaccess communication; Permission; Spread spectrum communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 2002. ISLPED '02. Proceedings of the 2002 International Symposium on
Print_ISBN :
1-5811-3475-4
Type :
conf
DOI :
10.1109/LPE.2002.146759
Filename :
1029625
Link To Document :
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