• DocumentCode
    2191442
  • Title

    ATPG for timing-induced functional errors on trigger events in hardware-software systems

  • Author

    Arekapudi, Srikanth ; Xin, Fei ; Peng, Jinzheng ; Harris, Ian G.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    23
  • Lastpage
    28
  • Abstract
    We consider timing-induced functional errors in inter process communication. We present an Automatic Test Pattern Generation (ATPG) algorithm for the co-validation of hardware-software systems. Events on trigger signals (signals contained in the sensitivity list of a process) implement the basic synchronization mechanism in most hardware-software description languages. Timing faults on trigger signals can have a serious impact on system behavior. We target timing faults on trigger signals by enhancing a timing fault model proposed in previous work. The ATPG algorithm which we present targets the new timing fault model and provides significant performance benefits over manual test generation which is typically used for co-validation.
  • Keywords
    automatic test pattern generation; errors; fault simulation; timing; ATPG algorithm; automatic test pattern generation; hardware-software system co-validation; inter process communication; synchronization mechanism; test sequence generation; timing fault model; timing faults; timing-induced functional errors; Automatic test pattern generation; Computer errors; Electronics industry; Fault detection; Hardware design languages; Signal processing; Software testing; System testing; Test pattern generators; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Workshop, 2002. Proceedings. The Seventh IEEE European
  • ISSN
    1530-1877
  • Print_ISBN
    0-7695-1715-3
  • Type

    conf

  • DOI
    10.1109/ETW.2002.1029635
  • Filename
    1029635