Title :
An algorithm for reduced order modelling of digital controllers
Author :
Sahani, A.K. ; Nagar, S.K. ; Pal, Jayanta
Author_Institution :
Dept. of Electr. Eng., Banaras Hindu Univ., Varanasi, India
Abstract :
An algorithm for designing reduced order digital controller which can replace an existing high order cascade digital controller is presented. The parameters of the reduced order controller are obtained by applying frequency response technique. The new algorithm is illustrated by some examples.
Keywords :
control system analysis; digital control; frequency response; reduced order systems; digital controllers; frequency response technique; high order cascade digital controller; reduced order modelling; Algorithm design and analysis; Control systems; Costs; Design methodology; Digital control; Error correction; Frequency response; Hardware; Open loop systems; Transfer functions;
Conference_Titel :
Industrial Technology 2000. Proceedings of IEEE International Conference on
Print_ISBN :
0-7803-5812-0
DOI :
10.1109/ICIT.2000.854264
