A 30 V line driver in submicron BiCMOS technology

Author

Aliahmad, Mehran ; Salama, C.A.T.

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada

fYear

1996

fDate

20-23 May 1996

Firstpage

61

Lastpage

64

Abstract

This paper presents a 30 V line driver for telecommunication applications. The circuit (0.3 mm² in area) is implemented in a 5 V 0.8 μm BiCMOS process using 30 V extended-drain MOS devices fully compatible with low voltage technology. The design uses a Quasi-Current Mirror output stage and is capable of delivering up to 30 mA to the load with an idle current of less than 1 mA. The line driver exhibits a bandwidth of 2 MHz with a phase margin of 45

Keywords

BiCMOS analogue integrated circuits; VLSI; driver circuits; integrated circuit design; integrated circuit reliability; telecommunication equipment; 0.8 micron; 2 MHz; 30 V; VLSI; extended-drain MOS devices; idle current; line driver; phase margin; quasi-current mirror output stage; submicron BiCMOS technology; telecommunication applications; Application software; Bandwidth; BiCMOS integrated circuits; Capacitors; Driver circuits; Energy consumption; MOS devices; MOSFETs; Mirrors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 1996. ISPSD '96 Proceedings., 8th International Symposium on

Conference_Location

Maui, HI

ISSN

1063-6854

Print_ISBN

0-7803-3106-0

Type

conf

DOI

10.1109/ISPSD.1996.509449

Filename

509449