DocumentCode
2192804
Title
The dual gate EST: a new MOS-gated thyristor structure
Author
Sawant, S. ; Sridhar, S. ; Iga, B. J Bal
Author_Institution
Power Semicond. Res. Center, North Carolina State Univ., Raleigh, NC, USA
fYear
1996
fDate
20-23 May 1996
Firstpage
125
Lastpage
128
Abstract
In this paper, the characteristics of a new MOS-gated thyristor-the Dual Gate Emitter Switched Thyristor (DG-EST)-are presented. The DG-EST consists of a Dual Channel Emitter Switched Thyristor (DC-EST) section and a Conventional Emitter Switched Thyristor (C-EST) section with a common main thyristor region that can be controlled using two independent gate electrodes. This device has a lower on-state voltage drop than the C-EST and at the same time possesses the high voltage current saturation feature of the DC-EST. The DG-EST has been found to exhibit a much higher parasitic thyristor latch-up current density than the C-EST and the DC-EST structures and has a superior trade-off curve between on-state voltage drop and turn-off time when compared to the C-EST structure
Keywords
MOS-controlled thyristors; DG-EST; MOS-gated thyristor; dual gate emitter switched thyristor; high voltage current saturation; on-state voltage drop; parasitic latch-up current density; turn-off time; Breakdown voltage; Current density; Diversity reception; Electrodes; Impedance; Insulated gate bipolar transistors; Low voltage; MOSFET circuits; Power semiconductor switches; Thyristors;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 1996. ISPSD '96 Proceedings., 8th International Symposium on
Conference_Location
Maui, HI
ISSN
1063-6854
Print_ISBN
0-7803-3106-0
Type
conf
DOI
10.1109/ISPSD.1996.509463
Filename
509463
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