DocumentCode
2193309
Title
A software framework for trace analysis targeting multicore platforms design
Author
Wei, Guopeng ; Bogdan, Paul ; Marculescu, Radu
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2011
fDate
1-4 May 2011
Firstpage
259
Lastpage
260
Abstract
This demonstration presents a complete software framework for dynamically mapping multi-threaded applications on a cycle accurate Network-on-Chip (NoC) architecture, analyzing the statistics of network workloads and drawing general guidelines regarding the design and optimization of NoCs.
Keywords
circuit optimisation; electronic engineering computing; integrated circuit design; multi-threading; multiprocessing systems; network-on-chip; statistical analysis; NoC architecture; NoC design; NoC optimization; cycle accurate network-on-chip architecture; dynamically mapping multithreaded applications; multicore platforms design; network workloads; software framework; statistical analysis; trace analysis; Design automation; Measurement; Multicore processing; Optimization; Routing; Software; USA Councils; Network on chip; multicore; trace analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Networks on Chip (NoCS), 2011 Fifth IEEE/ACM International Symposium on
Conference_Location
Pittsburgh, PA
Electronic_ISBN
978-1-4503-0720-8
Type
conf
Filename
5948574
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