DocumentCode
2193317
Title
Experimental investigation of high voltage and high current gain of a lateral bipolar transistor based on a lateral DMOS structure
Author
Shibib, M. Ayman
Author_Institution
Bell Labs., Lucent Technol. Inc., Reading, PA, USA
fYear
1996
fDate
20-23 May 1996
Firstpage
211
Lastpage
214
Abstract
Experimental results of a lateral high voltage NPN transistor based on a lateral DMOS structure fabricated in a low cost power BiCMOS technology are presented. Common-emitter current gain of typical devices were about 300 for the lateral devices compared to about 100 for a vertical device. The lateral NPN devices had emitter to collector breakdown voltages of 30 and 70 volts depending on the length of the collector region
Keywords
BiCMOS integrated circuits; electric breakdown; power bipolar transistors; power integrated circuits; 30 to 70 V; HV NPN transistor; breakdown voltages; high current gain; high voltage device; lateral DMOS structure; lateral bipolar transistor; low cost power BiCMOS technology; BiCMOS integrated circuits; Bipolar transistors; Breakdown voltage; CMOS process; CMOS technology; Costs; Immune system; MOSFETs; Sheet materials; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 1996. ISPSD '96 Proceedings., 8th International Symposium on
Conference_Location
Maui, HI
ISSN
1063-6854
Print_ISBN
0-7803-3106-0
Type
conf
DOI
10.1109/ISPSD.1996.509483
Filename
509483
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